Job Title: Systems Validation Engineer Contract: 12 months (Extendable) Work Location: Markham, ON Pay Rate: $(40 to 50)/hr on T4

THE ROLE :CLIENT is looking for a Systems Validation Engineer to provide subject matter expertise to our growing team. As a key contributor, you will have a strong technical background to contribute to all aspects of the post-silicon development process. We have competitive benefit packages and an award-winning culture. Join us !The CLIENT S3 Business Unit IP Systems Engineering team is seeking an energetic, dynamic, experienced IP Systems Engineer to join our growing team. We work with customers to develop new products, previously including game consoles. As an IP Systems Engineer, you will drive the planning, post-silicon execution, silicon bring-up and debug of CLIENT processor and graphics-based systems while working closely with internal teams to meet product development milestones .As a key contributor to the success of CLIENT's IP, you will be part of a leading team that drives and enhances CLIENT's abilities to deliver industry-leading technologies to our customers. The Systems Engineering team encourages technical innovation to showcase successes, provides opportunities to develop technical knowledge, and facilitates career development .This role specifically focuses on the post-silicon hardware validation of SoC internal address, control, and data hub subsystems. This role focuses on bring-up and debug of complex, fully-custom SoC products as well as debugging of system integration from a PCB perspective

. KEY RESPONSIBILITIE S:Participate in systems design development throughout the entire product lifecycle, from pre-silicon and emulation through post-silicon and software integration and validatio n.Collaborate with Design, Software, Tools, and other teams to drive the definition of testing and debug methodologies to provide the best possible coverage and customer experience for the CLIENT internal address and data hub subsyste m.Isolation and debug of issues found in the hardware interconnect layers of an SoC syste m.Defining and executing validation strategies, enablement of features, and unit test plan s.Publishing and aligning test plan requirements, deliverables, and dependencie s.Working closely with supporting teams such as Design, Diagnostics, Software/Firmware/BIOS/Driver, and Project Leadershi p.Lead cross-functional technical discussions to drive root cause identification and resolution of technical issue

s. REQUIREMEN TS:In-depth knowledge of SoC architecture, computer architecture, and concep ts.Knowledge of PCB design concepts and debugging PCB design issu es.Experience with FPGA and other hardware emulation platforms for pre-silicon deb ug.Strong understanding of BIOS, OS (Windows/Linux), and driver-level interactions and common failure poin ts.Good understanding of boot flows and power sequenc es.Knowledge of standard power management features and use-cas

es. PREFERRED EXPERIE NCE:Minimum 2–6 years of experience in pre and post-silicon validation and 2–8 years of experience in the semiconductor indus try.Demonstrated ability to grasp new technical concepts quic kly.Hardware description languages (e.g., Veril og).Strong programming/scripting skills (e.g., Python, C/C++, Ru by).Experience with Windows and Li nux.Experience with IP/System-level bring-up, SoC debug techniques, and methodolog ies.Strong analytical/problem-solving skills and pronounced attention to det

ail.